Semiconductor memory device and memory initializing method

Details Semiconductor memory device and memory initializing method Semiconductor memory device and memory initializing method

1994-01-24

1996-05-14

Nguyen, Tan T.

Static information storage and retrieval

Read/write circuit

Precharge

365201, 365190, 36518901, G11C 2900

Patent

active

055174515

ABSTRACT:
A semiconductor memory device and an initialization method therefor, wherein writing of the initialization data into memory cells of the semiconductor memory device can be performed in a simple way in a short period of time. When initialization is performed, a high (H) level initialization mode signal DFT is generated from initialization control unit 24. A sense amplifier driving circuit 20 sets a sense amplifier driving signal PC, NC to the high-impedance state, equalization control signal generating unit 22 maintains the equalization control signal .phi.E on the H-level, and bit line driving circuit 26 sets precharge feed line BLR on Vcc (H-level) or Vss low (L) level). In this way, in the memory cell array, the operation of sense amplifier SAi of each row stops, and transistors TR3, TR4, TR5 of precharge circuit PRi are ON, while voltage Vcc or Vss of precharge feed line BLR is fed to two bit lines BLi, BLi- through transistors TR1, TR2. In this state, the word line WLj of the assigned column is activated.

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