Semiconductor memory device and its fabricating method

Details Semiconductor memory device and its fabricating method Semiconductor memory device and its fabricating method

1990-09-07

1992-09-01

Fears, Terrell W.

Static information storage and retrieval

Systems using particular element

Capacitors

365182, G11C 1300, G11C 1124

Patent

active

051445794

ABSTRACT:
A semiconductor memory device wherein at least one of a storage node contact hole and a bit line contact hole includes a first contact hole made in a first inter-layer insulating film formed over a gate electrode and a second contact hole made in a second inter-layer insulating film formed over an electrically conductive material embedded up to a level higher than the gate electrode in the first contact hole which is contacted with the electrically conductive material, the conductive material being exposed by etching a part of the second inter-layer insulating film, whereby the size of the memory device can be made small and the reliability can be improved. Further, a capacitor is formed in a layer higher than a bit line thereby to facilitate the processing of a storage node electrode to increase the capacitor area and to improve the reliability since it is unnecessary to carry out patterning a plate electrode within a cell array. With the above construction, a short-circuiting between the embedded layers is removed and a good quality of the second inter-layer insulating film is formed.

REFERENCES:
patent: 4979013 (1990-12-01), Furutani et al.
"Dynamic Semiconductor RAM Structures," p. 12, which refers to IBM Technical Bulletin, vol. 15, No. 12, pp. 3585-3586, May 1, 1973.

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