Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1993-07-12
1995-06-06
Popek, Joseph A.
Static information storage and retrieval
Read/write circuit
Bad bit
3652257, 36523006, 36523002, 326 13, 327526, G11C 1140
Patent
active
054228506
ABSTRACT:
To provide a type of semiconductor memory device characterized by the fact that the redundancy for the defective memory of defective bits is increased and the area occupied by the redundant memory address decoder on the chip is minimized, thereby reducing the cost of the semiconductor memory device. It has multiple fuse decoders which are commonly connected to the address bus and are programmed for the different addresses, and it has a redundant address decoder which detects coincidence/uncoincidence between the outputs of the two decoders and generates a redundant address coincidence signal, so as to increase the efficiency in repairing the defective memory.
REFERENCES:
patent: 4773046 (1988-09-01), Akaogi et al.
patent: 5262994 (1993-11-01), McClure
Saeki Tetsuya
Sukegawa Shunichi
Donaldson Richard L.
Hiller William E.
Hitachi , Ltd.
Hoang Huan
Popek Joseph A.
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