Semiconductor memory device and data processing methods thereof

Static information storage and retrieval – Read/write circuit – Signals

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

365194, 36518901, 36523802, G11C 700

Patent

active

061011355

ABSTRACT:
A circuit for bypassing a write to semiconductor memory capable of doing so when a read operation is performed on a read address that matches the write address for write operation that is bypassed. The circuit detects patterns of a read address that matches a write address performed within the last two cycles. Depending on the type of match found, the circuit generates one or more of several bypass control signals. The current input data or input data from one of the last two cycles is selected for output responsive to the bypass control signals resulting in a bypass of writing to memory. If a bypass control signal is not selected then the input data is written to memory after the delay necessary to determine if the write operation should be bypassed.

REFERENCES:
patent: 4998221 (1991-03-01), Correale, Jr.
patent: 5371708 (1994-12-01), Kobayashi
patent: 5612916 (1997-03-01), Neduva

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Semiconductor memory device and data processing methods thereof does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor memory device and data processing methods thereof, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device and data processing methods thereof will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-1156590

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.