Semiconductor memory device and control method thereof

Details Semiconductor memory device and control method thereof Semiconductor memory device and control method thereof

2007-07-23

2009-10-20

Phung, Anh (Department: 2824)

Static information storage and retrieval

Read/write circuit

Precharge

C365S207000

Reexamination Certificate

active

07606094

ABSTRACT:
A semiconductor memory device of the invention has memory cells arranged at intersections of bit lines and word lines, and comprises a sense amplifier for amplifying a minute potential difference appearing on a bit line pair; a power supply line pair including first and second power supply lines for supplying first and second potentials to the sense amplifier; a pre-charge power supply line for supplying a predetermined pre-charge potential; a power supply line equalize circuit for setting the first and second potentials at the same potential based on the pre-charge potential; a current limit circuit inserted in series in a predetermined current path from the pre-charge power supply line to the power supply line pair; and switch means capable of switching whether or not current flowing from the pre-charge power supply line to the power supply line pair is limited by the current limit circuit based on a control signal.

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