Semiconductor memory device and control method thereof

Details Semiconductor memory device and control method thereof Semiconductor memory device and control method thereof

2007-02-27

2007-02-27

Zarabian, Amir (Department: 2827)

Static information storage and retrieval

Read/write circuit

Multiplexing

C365S238500, C365S189030, C365S230020, C365S239000, C365S221000

Reexamination Certificate

active

10985876

ABSTRACT:
A semiconductor memory device has common terminals shared between a part or all of address terminals for receiving n bits of an address signal and data terminals for outputting a data signal with its bit width of n bits or less and dedicated address terminals for receiving m bits of the address signal, wherein at the time of a read, after the n bits of the address signal have been input, a plurality of data signals within a selected page are consecutively read out through the common terminals using the m bits of the address signal input from the dedicated address terminals.

REFERENCES:
patent: 5600606 (1997-02-01), Rao
patent: 2003/0146950 (2003-08-01), Miyo et al.
patent: 2-177190 (1990-07-01), None
patent: 2003-233989 (2003-08-01), None
“Memory for Cellular Phone Applications Mobile FCRAM (R) Equipped With High-Speed Page Mode MB82DPS02183B/MB82DP02322A”, Fujitsu Electric Devices News Find vol. 20, No. 6, 2002.

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