Semiconductor memory device

Static information storage and retrieval – Read/write circuit – Precharge

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365204, 365190, G11C 700

Patent

active

058222600

ABSTRACT:
Disclosed is a semiconductor memory device capable of shortening a precharge time and increasing a read out speed by increasing a difference potential between complementary read out data relating to a sensitivity of a data amplifier. In the semiconductor memory device, provided is a precharge control circuit which receives a precharge enable signal for controlling a precharge operation of a pair of read out signal lines, detects potentials of first and second reading-out signals generated on the pair of read out signal lines, and controls turning-on/off of first and second transistors which control a precharge operation for said pair of read out signal lines.

REFERENCES:
patent: 5636169 (1997-06-01), Oh
patent: 5650970 (1997-07-01), Kai
patent: 5703816 (1997-12-01), Nam et al.

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