Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1992-03-04

1994-05-10

LaRoche, Eugene R.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

365205, 365207, 365208, G11C 700

Patent

active

053114698

ABSTRACT:
A semiconductor memory device including: a memory cell array having at least one cell array unit, the cell array unit including a plurality of memory cells; a decoder for selecting at least one the memory cell in accordance with an externally supplied address; an input/output terminal for outputting data read from the selected memory cell and for receiving data supplied externally and sending the data to the selected memory cell; at least one data line for connecting the input/output terminal to each the cell array unit; sense amplifiers serially connected to each the data line in a multiple stage configuration for amplifying the read data; a write buffer connected in parallel with one of the sense amplifiers connected to each data line; by-pass switching elements connected between input and output terminals of the other sense amplifiers connected to each the data line; and a control circuit for applying an on-signal to at least one by-pass switching element when writing data, the on-signal turning on at least one by-pass switching element.

REFERENCES:
patent: 4891792 (1990-01-01), Hanamura et al.
patent: 5023841 (1991-06-01), Akrout et al.
patent: 5068831 (1991-11-01), Hoshi et al.

Affiliated with

Also associated with

Rating

Semiconductor memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2416664