Semiconductor memory device

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch

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365203, 365230, G11C 1140

Patent

active

046384618

ABSTRACT:
A semiconductor memory device, which comprises: a memory cell constituted by MOSFETs; a bit line for transmitting a writing and a reading information to the memory cell therethrough; a writing-in control signal line for controlling the writing operation onto the memory cell; and a writing circuit for transmitting the writing information input from the outside to the bit line at the time of writing but raising the voltage of the bit line up to a power supply voltage at the time of non-writing.

REFERENCES:
patent: 4300213 (1981-11-01), Tanimura et al.
patent: 4417328 (1983-11-01), Ochii
Schlageter et al, "A 4K Static 5-V RAM", 1976 IEEE International Solid-State Circuits Conference, pp. 136-137.

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