Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1992-09-14

1993-09-14

Clawson, Jr., Joseph E.

Static information storage and retrieval

Read/write circuit

Precharge

36518905, 36518909, 36518911, 365190, 365204, 365208, 36523006, G11C 700

Patent

active

052455793

ABSTRACT:
A semiconductor memory device for storing data includes a plurality of cells (4) aligned horizontally and vertically; first bit lines (BL) connected to cells occurring in odd number locations of vertically aligned cells; second bit lines (BL#) connected to cells occurring in the even number locations of the vertically aligned cells; writing circuits (2); a precharge circuit (6); and, a writing control circuit (1). The writing circuit (2) simultaneously charges one of the bit lines to a predetermined voltage and maintains the other of the bit lines at a precharge voltage level. The write circuit control means (1) controls which of the bit lines is to be charged to the predetermined voltage level and which of the bit lines is to be maintained at the precharge voltage level, whereby common data is written to all memory cells (4) in a row when a word signal is activated on a word line connected to the row.

REFERENCES:
patent: 4701888 (1987-10-01), Yokouchi
patent: 4879685 (1989-11-01), Takemae
patent: 4956819 (1990-09-01), Hoffman et al.
patent: 5010523 (1991-04-01), Yamauchi

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