Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1994-05-16

1995-10-31

Lee, Benny

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

36523008, 365203, G11C 700, G11C 800

Patent

active

054635845

ABSTRACT:
The semiconductor memory device according to the present invention includes a plurality of memory cells that are provided in array form and a plurality of bit lines and word lines that are respectively connected to these memory cells, and comprises a memory cell array arranged so as to form pairs of bit lines, a data register circuit consisting of a plurality of registers, and selection means for respectively connecting predetermined bit line pairs out of the plurality of bit line pairs to a plurality of registers in response to a control signal.
This data register circuit is formed by arranging the plurality of registers in a single line.
With such a constitution, the number of registers that constitute the data register circuit can be reduced compared with the conventional device. Accordingly, it becomes possible to arrange the registers in a single line, the area for the data register circuit can sharply be reduced in comparison to the case of the conventional device, contributing to the integration of the semiconductor memory device.

REFERENCES:
patent: 4577293 (1986-03-01), Matick et al.
patent: 4603403 (1986-07-01), Toda
patent: 4658377 (1987-04-01), McElroy
patent: 4855957 (1989-08-01), Nogami
patent: 4954987 (1990-09-01), Auvinen et al.
patent: 4974203 (1990-11-01), Sukurai
patent: 5029134 (1991-07-01), Watanabe

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