Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1989-09-11

1991-09-24

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Multiplexing

365149, 36523003, G11C 700

Patent

active

050519549

ABSTRACT:
Memory cells disposed in a matrix are divided into a plurality of blocks. Each block is constructed of n (n is a positive integer larger than 2) memory cell columns. One block is selected by one column address. One memory cell column in the n memory cell columns in a selected block is selected by a first gate. One memory cell column in the n memory cell colunns in a selected block is selected by a second gate. One memory cell in a selected memory cell column is selected by a row address. The data in a selected memory cell are stored in a register and output therefrom.

REFERENCES:
patent: 4367540 (1983-01-01), Shimohigashi
patent: 4608666 (1986-08-01), Uchida
patent: 4758987 (1988-07-01), Sakui

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