Semiconductor memory device

Static information storage and retrieval – Read/write circuit – Precharge

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Details

365205, 36523003, G11C 700

Patent

active

061446025

ABSTRACT:
As the pre-charge potential for write global data buses (12, 13), a potential lower than the power supply voltage (Vii) for peripheral circuit by the threshold voltage (Vth) of a transistor is used. This suppresses disturbance in the potential of a pair of bit lines (18, 19) due to pre-charge operation. It suffices if the write global data buses are pre-charged to the potential lower than the power supply voltage (Vii) for peripheral circuit by the threshold voltage (Vth). This can reduce current consumption accordingly. By generating the pre-charge potential without using the power supply voltage (Viic) for core, adverse effects on sense operation can be avoided.

REFERENCES:
patent: 5625592 (1997-04-01), Shinozaki
patent: 5907515 (1999-05-01), Hatakeyama

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