Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1996-12-27

1997-12-09

Nelms, David C.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

36518901, 36518908, 36523008, G11C 700

Patent

active

056967209

ABSTRACT:
A semiconductor memory device comprising a plurality of memory cells for storing data therein, a data input buffer circuit for buffering an input data signal, a data register circuit for storing the input data signal therein, a switching element for transferring the input data signal to the data register circuit, a register set control logic unit for controlling the switching element, a register set decoding circuit for decoding an output signal from the register set control logic unit and a first address signal, a write data drive circuit for transferring an output data signal from the data input buffer circuit or the data register circuit to a selected one of the memory cells, a first data transfer element for transferring the output data signal from the data input buffer circuit to the write data drive circuit, a second data transfer element for transferring the output data signal from the data register circuit to the write data drive circuit, a data transfer control circuit for generating first and second control signals to control the first and second data transfer element, respectively, and a data register output control circuit for decoding the second control signal from the data transfer control circuit and a second address signal.

REFERENCES:
patent: 4562555 (1985-12-01), Ouchi et al.
patent: 5200925 (1993-04-01), Morooka
patent: 5500820 (1996-03-01), Nakaoka
patent: 5530676 (1996-06-01), Sullivan et al.
patent: 5553024 (1996-09-01), Furuyama
patent: 5604714 (1997-02-01), Manning et al.

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