Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1984-12-03

1987-03-24

Moffitt, James W.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

365205, G11C 700

Patent

active

046530274

ABSTRACT:
A semiconductor memory device operated synchronously with clock signals, such as a MOS dynamic RAM device. The semiconductor memory device includes a switch circuit inserted between a prestage output amplifier circuit receiving a readout signal from a memory cell and an output buffer circuit. The switch circuit is turned on just before the output signal is supplied from the prestage output amplifier circuit to the output buffer circuit and turned off after the output condition of the output buffer circuit is settled. The potential corresponding to the output data is maintained in the circuit between the switch circuit and the output buffer circuit. The output condition of the output buffer circuit is therefore retained even during the reset period of the prestage drive circuit, and the duration period of the output signal is expanded.

REFERENCES:
patent: 3969706 (1976-07-01), Proebsting et al.

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