Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1979-05-23

1981-06-09

Hecker, Stuart N.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

365233, G11C 700

Patent

active

042728320

ABSTRACT:
A semiconductor memory device comprises an input address buffer circuit and a memory cell circuit which are constructed of static logic circuits, an address decoder circuit which is constructed of a dynamic logic circuit, a detector circuit which detects a change in an input address signal, and a pulse generator circuit which is started operating by an output signal of the detector circuit and which provides a clock signal for the dynamic logic circuit. Owing to the detector circuit and the pulse generator circuit, the semiconductor memory device operates without the necessity for any external clock signal.

REFERENCES:
patent: 3935565 (1976-01-01), Moore
patent: 3962686 (1976-06-01), Matsue et al.
Hultman, Memery Clock Design, IBM Tech. Disc. Bul., vol. 9, No. 10, 3/67, pp. 1328-1329.

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