Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1997-12-22

1999-01-19

Nelms, David

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

36518911, 365226, G11C 1604, G11C 700

Patent

active

058620842

ABSTRACT:
An output circuit for a semiconductor memory device includes at least an output transistor and a level conversion circuit. In this case, the level conversion circuit is connected to the output transistor. The output transistor is connected to a ground terminal and an output terminal. In this condition, the level conversion circuit converts an input signal in level and supplies the converted input signal to the output transistor as drive signal. With such a structure, a predetermined booster voltage is given to the level conversion circuit. Consequently, the ground potential appears at the output terminal without an access delay when the output transistor is turned on by the drive signal.

REFERENCES:
patent: 5416368 (1995-05-01), Sugibaysahi
patent: 5448198 (1995-09-01), Toyoshima et al.
patent: 5680068 (1997-10-01), Ochi et al.

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