Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1998-02-20

1999-03-30

Dinh, Son T.

Static information storage and retrieval

Read/write circuit

Bad bit

36523003, G11C 700

Patent

active

058897127

ABSTRACT:
A semiconductor memory device is disclosed, in which a memory region which can not be used due to existence of defective bit line is reduced. In a DRAM of a double word line system, when there is a defective bit line 103 in a certain block thereof, only a memory region 104 in a right or left portion of the block to which the defective bit line 103 belongs is made invalid and a region on the other side is made valid. In this case, clusters are constructed with the valid memory region by converting the uppermost bits of a row address and the uppermost bits of a column address by means of an address conversion circuit.

REFERENCES:
patent: 5257229 (1993-10-01), McClure et al.
patent: 5691946 (1997-11-01), DeBrosse et al.
patent: 5761138 (1998-01-01), Lee et al.
patent: 5798973 (1998-08-01), Isa
patent: 5801999 (1998-09-01), Satou et al.

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