Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1994-01-31

1994-12-13

LaRoche, Eugene R.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

36518901, 365190, 36523006, 36523008, G11C 700

Patent

active

053734688

ABSTRACT:
A semiconductor memory device comprises a memory cell array including a plurality of adjacently disposed first and second memory cell pairs, with bit lines defined in the memory cell array. Switching elements are interposed between the memory cells and the bit lines. Word lines are connected to the switching elements, for selecting one of the memory cells by operating the switching elements, so that data is written on and is read out from selected memory cell through the bit lines. Each bit line is arranged between the first and second memory cells, so that each bit line serves as a common bit line to the first and second memory cells. A buffer circuit is connected to each word line and the buffer circuit transmits the first, second and third select signals each having a different voltage level from each other. The switching elements are respectively connected to the first and second memory cells. The switching element connected to the first memory cell is turned on in response to the first select signal, the switching element connected to the second memory cell is turned on in response to the second select signal, and the switching elements respectively connected to the first and second memory cells is turned off in response to the third select signal.

REFERENCES:
patent: 5276650 (1994-01-01), Kubota

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