Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1991-02-07

1993-11-09

LaRoche, Eugene R.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

36518904, 365218, 36523001, 36518903, G11C 1100, G11C 1334

Patent

active

052608956

ABSTRACT:
A semiconductor memory device comprises a memory cell array formed by arranging a plurality of rewritable non-volatile memory cells in matrix form and in correspondence to address lines and bit positions so as to be connected to erase and write lines via select gate transistors; and a controller for applying a rewriting voltage to any one of each erase line and each write line according to each bit logical value of an input data or according to each bit logical value of each selected bit of an input data in order to execute data rewrite operation. Since data rewrite operation can be executed to only the memory cells belonging to an address and required to be rewritten without once erasing all the memory cells, the data rewriting speed can be increased. By another aspect, the controller applies predetermined high voltage only for memory cells selected according to bit selection, resulting in longer lifetime of the memory cells.

REFERENCES:
patent: 4931997 (1990-06-01), Mitsuishi et al.
patent: 5053990 (1991-10-01), Kreifels et al.

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