Semiconductor memory device

Static information storage and retrieval – Read/write circuit – Precharge

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365222, 365 49, G11C 800

Patent

active

055900810

ABSTRACT:
A dynamic semiconductor memory device includes a timing signal generator for controlling a precharge operation such that the predetermined precharge operation is completed, during a memory refresh cycle, for a sense amplifier and bit lines corresponding thereto for the next memory access. The memory device using the sense amplifier as cache keeping means is capable of increasing the memory access speed immediately after a memory refresh operation.

REFERENCES:
patent: 5301162 (1994-04-01), Shimizu
patent: 5488584 (1996-01-01), Vo et al.
patent: 5528552 (1996-06-01), Kamisaki

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