Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1999-02-24

2000-05-09

Nelms, David

Static information storage and retrieval

Read/write circuit

Precharge

36518509, G11C 700

Patent

active

060612878

ABSTRACT:
A semiconductor memory device includes a memory cell array, a read/write control circuit, a signal generator, and a write error prevention circuit. In the memory cell array, a plurality of memory cells are formed at intersections of pluralities of word lines and bit lines. The read/write control circuit controls a data read/write from/in the memory cell array in accordance with a mode setting signal representing a read/write mode, a data input signal, and an address signal. The signal generator generates a one-shot pulse signal when the mode setting signal represents a write mode. The write error prevention circuit precharges a bit line of the memory cell array by the one-shot pulse signal from the signal generator.

REFERENCES:
patent: 5600605 (1997-02-01), Schaefer
patent: 5703831 (1997-12-01), Sawada
patent: 5818777 (1998-10-01), Seyyedy

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