Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1985-02-27

1988-08-23

Moffitt, James W.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

365230, G11C 700

Patent

active

047665718

ABSTRACT:
A semiconductor memory device including a reset signal generator for generating a reset signal for resetting a bit line pair to an equal potential when a chip selection control signal represents a nonselection state of a memory chip. The reset signal has a reset period longer than a predetermined period even when the period of the chip selection control state representing the nonselection state is shorter than the predetermined period, thereby ensuring resetting the bit line pair and the shortening of accessing time.

REFERENCES:
patent: 4090096 (1978-05-01), Nagami
patent: 4272834 (1981-06-01), Noguchi et al.
patent: 4516224 (1985-05-01), Aoyama
patent: 4616344 (1986-10-01), Noguchi et al.
IBM Technical Disclosure Bulletin, vol. 18, No. 8, Jan. 1976, pp. 2450-2451, New York, U.S.; L. M. Arzuki: "Write/Sense for Monolithic Memories".
Patent Abstracts of Japan, vol. 3, No. 54, 10th May 1979, p. 21 E109; & JP-A-54 32 235 (Futjitsu K.K.) 09-03-79.

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