Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

2009-03-18

2010-12-14

Auduong, Gene N (Department: 2827)

Static information storage and retrieval

Read/write circuit

Including specified plural element logic arrangement

C365S189070, C365S189120

Reexamination Certificate

active

07852685

ABSTRACT:
A semiconductor memory device comprises a first exclusive-OR circuit which compares mth N-bit first data with (m+1)th N-bit second data, a majority circuit which generates flag data to invert the second data if a comparison result of the first exclusive-OR circuit indicates that the number of mismatch bits between the first data and the second data is not less than N/2, and generates flag data to noninvert the second data if the number of mismatch bits between the first data and the second data is less than N/2, a second exclusive-OR circuit which inverts or noninverts the second data based on the flag data, a shift register which stores the flag data generated by the majority circuit, and a pad to serially output both the inverted or noninverted second data and the flag data.

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patent: 7426663 (2008-09-01), Takazawa et al.
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patent: 59-212027 (1984-11-01), None
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patent: 2004-133961 (2004-04-01), None

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