Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

2009-04-03

2010-12-28

Ho, Hoai V (Department: 2827)

Static information storage and retrieval

Read/write circuit

Precharge

C365S189020, C365S189030, C365S189150, C365S189050, C365S233170, C365S204000

Reexamination Certificate

active

07859926

ABSTRACT:
Disclosed is a semiconductor memory device including a discharge circuit that discharges bit lines to a ground potential, a sense amplifier of a single-ended input configuration, and a charging transistor connected between a power supply and an input node of the sense amplifier. The charging transistor charges a bit line from a side of the input node of the sense amplifier via the selected column select transistor which is set to an on state. When a current path to the ground from the bit line to which a selected memory cell is connected is turned off at a time of reading, the input node of the sense amplifier is charged by the charging transistor, and a potential at the input node of the sense amplifier is thereby raised. Then, after the input node of the sense amplifier has been further charged with the one of the column select transistors turned off, the reading operation is performed.

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patent: 2006/0171240 (2006-08-01), Combe
patent: 2009/0086524 (2009-04-01), Alam et al.
patent: 7-78489 (1995-03-01), None

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