Semiconductor memory device

Static information storage and retrieval – Read/write circuit – Precharge

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365174, 3072388, G11C 1140

Patent

active

042813999

ABSTRACT:
Disclosure is a semiconductor memory device comprising a memory cell array having a plurality of memory cells arranged in a matrix fashion each formed of a field effect transistor and a capacitor, a plurality of word lines each connected commonly to the gates of those field effect transistors which are arranged on an identical column of the memory cell array, a plurality of digit lines each connected commonly to the drains of those field effect transistors which are arranged on an identical row of the memory cell array, and a plurality of decoder circuits for selectively activating the word lines. In the memory device, the decoder circuit produces an output signal to drive the word line to a voltage level higher than a voltage level appearing on the activated digit line.

REFERENCES:
patent: 3801964 (1974-04-01), Palfi et al.
IEEE Journal of Solid-State Circuits, vol. SC-7, No. 3, Jun. 1972, pp. 217-224, "Eliminating Threshold Losses in MOS Circuits by Bootstrapping Using Varactor Coupling" by Reuben & Joynson et al.

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