Static information storage and retrieval – Read/write circuit – Signals
Reexamination Certificate
2007-08-23
2009-08-18
Tran, Michael T (Department: 2827)
Static information storage and retrieval
Read/write circuit
Signals
C365S189050
Reexamination Certificate
active
07577047
ABSTRACT:
A semiconductor memory device includes a delay time selecting portion for outputting, as a final read/write command, an internal read/write command that corresponds to an external read/write command and is synchronized with an external clock rising edge at a tRCD time without any delay when an address is applied before an address setup time based on the external clock rising edge of a previously set tRCD time, a decoder for decoding an address applied from an external portion with the read/write command to output a decoded address, and a selecting portion for receiving the decoded address to select a memory cell of a memory cell array in response to the final read/write command.
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Mills & Onello LLP
Samsung Electronics Co,. Ltd.
Tran Michael T
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