Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

2007-11-27

2007-11-27

Ho, Hoai V. (Department: 2827)

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

C365S185030, C365S185210, C365S196000, C365S205000

Reexamination Certificate

active

11378214

ABSTRACT:
In a semiconductor memory device for reading out multilevel data in a time-shared manner at different timings, by providing plural control signal lines for controlling the operation timings of the output buffer circuits, the operation timings of output buffer circuits can be displaced, and the number of output buffer circuits operating simultaneously can be decreased, with the result that noise is reduced. Besides, by allowing the output buffer circuit, which outputs data read out early in a time-shared manner, to operate at an early timing, data output is terminated without retarding the operation timing of the output buffer circuit operating at the last timing.

REFERENCES:
patent: 5457650 (1995-10-01), Sugiura et al.
patent: 6356486 (2002-03-01), Banks
patent: 7230857 (2007-06-01), Hyun et al.
patent: 5-100778 (1993-04-01), None
patent: 2003-008424 (2003-01-01), None

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