Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1981-03-27

1983-08-02

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

365193, G11C 1300

Patent

active

043970010

ABSTRACT:
A semiconductor memory device of a dynamic type, including a read/write circuit in a column circuit in which a data input pin and a data output pin are common. The read/write circuit comprises a data-output buffer (DOB) connected through a three-state circuit (Qa, Qb) to the common data input/output terminal (I/O), and a data write-in buffer of a dynamic type having a latching function and being connected between the common data input/output terminal and data buses, for providing latched data to the data buses. By utilizing a rise or a fall of a write enable signal or a column address strobe signal applied to the memory device, the three-state circuit is set to be a high impedance, and then, write data is latched into the data write-in buffer.

REFERENCES:
patent: 4158891 (1979-06-01), Fisher

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