Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

2007-01-02

2007-01-02

Le, Thong Q. (Department: 2827)

Static information storage and retrieval

Read/write circuit

Precharge

C365S191000

Reexamination Certificate

active

10907872

ABSTRACT:
A semiconductor memory device comprises a central control circuit for receiving an operation command from an external chipset, generating an active signal for executing the operation command, and generating a precharge signal after a predetermined time, a row path control circuit for controlling a bank according to the active signal or the precharge signal of the central control circuit, and a precharge time control circuit, which is enabled according to the active signal to output an oscillation signal having a predetermined frequency, divides the oscillation signal based on a setting time from when an active operation is performed until when a precharge operation is performed, and then outputs a precharge time control signal, thereby controlling generation of the precharge signal of the central control circuit.

REFERENCES:
patent: 6043695 (2000-03-01), O'Sullivan
patent: 6711229 (2004-03-01), Harada
patent: 2002/0186064 (2002-12-01), Ooishi
patent: 9082090 (1997-03-01), None
patent: 2003168292 (2003-06-01), None
patent: 2003297082 (2003-10-01), None
patent: 10-2002-0008878 (2002-02-01), None

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