Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

2007-05-01

2007-05-01

Dinh, Son (Department: 2824)

Static information storage and retrieval

Read/write circuit

Data refresh

C365S189050, C365S233100

Reexamination Certificate

active

11193145

ABSTRACT:
A memory device conducts a stable data access operation by removing glitch component in an internal clock outputted after a completion of self-refresh. This memory device includes a memory core region, a clock enable sensor for sensing an enable of a clock enable signal corresponding to a termination of a self-refresh operation to provide a sensing signal, a clock buffer for buffering a clock signal from the outside as an internal clock signal in response to the sensing signal and providing the internal clock signal to the memory core region, and a self-refresh control circuit for preventing a glitch component in the internal clock signal firstly outputted by the clock buffer in response to the sensing signal from transferring to the memory core region.

REFERENCES:
patent: 6333886 (2001-12-01), Cho et al.
patent: 6912169 (2005-06-01), Choi
patent: 6961278 (2005-11-01), Jeong
patent: 6990032 (2006-01-01), Jang
patent: 6990033 (2006-01-01), Cho

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