Semiconductor memory device

Static information storage and retrieval – Read/write circuit – Data refresh

Reexamination Certificate

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C365S230060

Reexamination Certificate

active

07092305

ABSTRACT:
A main control circuit generates a plurality of main control signals of different phases to local control circuits. The local control circuits produce row-related control signals greater in number than the main control signals in accordance with these main control signals. A semiconductor memory device can be easily adapted to change in bank structure, and can perform a fast and stable operation with a low current consumption.

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patent: 6538953 (2003-03-01), Hidaka
patent: 10-050958 (1998-02-01), None
“Figure 9 SLDRAM Functional Block Diagram”, IEEE Micro, Nov./Dec. 1997, pp. 38-39.
“A Configurable DRAM Macro Design for 2112 Derivative Organizations to be Synthesized Using a Memory Generator”, Yabe et al., 1998 IEEE International Solid-State Circuits Conference, Digest of Technical Papers, pp. 72-73.

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