Semiconductor memory device

Static information storage and retrieval – Systems using particular element – Magnetoresistive

Reexamination Certificate

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C365S171000, C365S173000

Reexamination Certificate

active

07046546

ABSTRACT:
A semiconductor memory device includes a first write wiring which has first to third running portions, first and second oblique running portions, the first and second running portions running in a first direction, the third running portion running on substantially a same line as the first running portion, the first and second oblique running portions running in first and second oblique directions, a second write wiring which has fourth to sixth running portions, third and fourth oblique running portions, the fourth and fifth running portions running in a second direction, the sixth running portion running on substantially a same line as the fourth running portion, the third and fourth oblique running portions running in third and fourth oblique directions, and a memory element which is at least partially sandwiched between the first and third oblique running portions.

REFERENCES:
patent: 5956267 (1999-09-01), Hurst et al.
patent: 6522579 (2003-02-01), Hoenigschmid
patent: 6545906 (2003-04-01), Savtchenko et al.
patent: 6590803 (2003-07-01), Saito et al.
patent: 6900490 (2005-05-01), Asao et al.
patent: 6914810 (2005-07-01), Hosotani
Mark Durlam, et al. “A 1-Mbit MRAM Based on 1T1MTJ Bit Cell Integrated With Copper interconnects”, IEEE Journal of Solid-State Circuits, vol. 38, No. 5, May 2003, pp. 769-773.
A. Bette, et al., “A High-Speed 128Kbit MRAM Core for Future Universal Memory Applications”, 2003 Symposium on VLSI Circuits Digest of Technical Papers, Jun. 2003, 4 Pages.

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