Semiconductor memory comprising a recognition circuit for signal

Static information storage and retrieval – Read/write circuit – Precharge

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3652335, G11C 700

Patent

active

049244434

ABSTRACT:
A semiconductor memory has a recognition circuit for signal changes which deactivates a pre-loading circuit. The pre-loading circuit charges the data lines upon appearance of an address signal change, and then reactivates them again in time-delayed fashion. A clock voltage generator is provided which generates a clock voltage that activates the pre-loading circuit and, given the appearance of an address signal change, switches the clock voltage to a first level that deactivates the pre-loading circuit and, given the appearance of an output signal at the read amplifier, switches this clock voltage to a second level activating the pre-loading circuit.

REFERENCES:
patent: 4355377 (1982-10-01), Sud et al.

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