Semiconductor memory circuit

Static information storage and retrieval – Read/write circuit – Precharge

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365204, G11C 700, G11C 1124

Patent

active

044046618

ABSTRACT:
A MOSRAM type semiconductor memory circuit in which the storage charge per bit cell is increased without a corresponding increase in per bit chip area. A potential decision circuit is provided for each bit line in the memory for setting a potential on the corresponding bit line. A boost circuit is provided for increasing the potential on each bit line in accordance with the operation of the potential decision circuit. One boost circuit may be provided for each bit line. Alternatively, a boost circuit may be provided common to all bit lines or a plurality of bit lines in the memory circuit.

REFERENCES:
patent: 4061999 (1977-12-01), Proebsting
patent: 4291393 (1981-09-01), Wilson
patent: 4327426 (1982-04-01), McAdams
S. S. Sheffield, "A 5V-Only 2Kx8 Dynamic RAM," 1979 IEEE International Solid-State Circuits Conference, Digest of Technical Papers, pp. 144, 145.
J. M. Lee, "A 80ns 5V-Only Dynamic RAM," 1979 IEEE International Solid-State Circuits Conference, Digest of Technical Papers, pp. 142, 143.

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