Semiconductor memory circuit

Static information storage and retrieval – Read/write circuit – Precharge

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365149, 365205, G11C 700

Patent

active

052028542

ABSTRACT:
A semiconductor memory circuit includes bit lines, word lines, memory cells, transfer gates, a sense amplifier, a precharge circuit and a control section. The transfer gates between the bit lines and the sense amplifier are non-conductive during the standby state of the memory. For reading-out data from the memory cell, the transfer gates are made conductive and thereafter the potential of the word line for the memory cell to be selected is raised to its high level, so that the data stored in the memory cell is read out on the bit line. Then, after the transfer gates are made non-conductive, the sense amplifier is activated. In this way, the coupling noise occuring when the transfer gates are made conductive before the level of the word lines become high and the coupling noise occuring when the transfer gates are made non-conductive after the level of the word lines become high cancel each other and, as a result, the voltage loss in the reading out of data from the memory can be eliminated.

REFERENCES:
patent: 4803664 (1989-02-01), Itoh
patent: 4943944 (1990-07-01), Sakui et al.
Toshio Takeshima et al., Session 16: Dynamic RAMs, FAM 16:5: A55ns 16Mb DRAM, Digest of Technical Papers of 1989 International Solid State Circuit Conference (ISSCC), pp. 246-247.

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