Semiconductor memory capable of being driven at low voltage...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C257S315000

Reexamination Certificate

active

06927133

ABSTRACT:
A gate insulating film is formed in a partial area of the surface of a semiconductor substrate, and on this gate insulating film, a gate electrode is formed. An ONO film is formed on the side wall of the gate electrode and on the surface of the semiconductor substrate on both sides of the gate electrode, conformable to the side wall and the surface. A silicon nitride film of the ONO film traps carriers. A conductive side wall spacer faces the side wall of the gate electrode and the surface of the semiconductor substrate via the ONO film. A conductive connection member electrically connects the side wall spacer and gate electrode. Source and drain regions are formed in the surface layer of the semiconductor substrate in areas sandwiching the gate electrode. A semiconductor device is provided which can store data of two bits in one memory cell and can be driven at a low voltage.

REFERENCES:
patent: 5408115 (1995-04-01), Chang
patent: 5467308 (1995-11-01), Chang et al.
patent: 5838041 (1998-11-01), Sakagami et al.
patent: 5969383 (1999-10-01), Chang et al.
patent: 6248633 (2001-06-01), Ogura et al.
patent: 6335554 (2002-01-01), Yoshikawa
patent: 05-326893 (1993-12-01), None
patent: 09-252059 (1997-09-01), None
patent: 2001-156188 (2001-06-01), None
patent: 2000-0076792 (2000-12-01), None
Boaz Eitan et al., NROM: A Novel Localized Trapping, 2-Bit Nonvolatile Memory Cell, IEEE Electron Device Letters, Nov., 2000, vol. 21, No. 11, pp. 543-545.

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