Semiconductor memory and semiconductor integrated circuit

Static information storage and retrieval – Systems using particular element – Semiconductive

Reexamination Certificate

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C365S051000, C365S210130

Reexamination Certificate

active

06967866

ABSTRACT:
A dummy MOSFET including a dummy gate separates nMOSFETs included in adjacent memory cells arranged in the direction in which bit lines extend. This configuration reduces a stress applied from an STI to the channel regions of the nMOSFETs. Accordingly, decrease of drive currents of the nMOSFETs is suppressed.

REFERENCES:
patent: 5468983 (1995-11-01), Hirase et al.
patent: 5604365 (1997-02-01), Kajigaya et al.
patent: 5959877 (1999-09-01), Takahashi
patent: 6376304 (2002-04-01), Matsuoka et al.
patent: 6770944 (2004-08-01), Nishinohara et al.
patent: 2000-195286 (2000-07-01), None
patent: 2003-17593 (2003-01-01), None

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