Semiconductor memory and process for fabricating the same

Details Semiconductor memory and process for fabricating the same Semiconductor memory and process for fabricating the same

2005-05-03

2005-05-03

Tran, Michael (Department: 2818)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C257S306000, C438S239000, C438S257000

Reexamination Certificate

active

06887752

ABSTRACT:
In a semiconductor memory, a barrier layer formed of a first metal film, a metal nitride film and a second metal film laminated in the named order is formed under a lower electrode of a ferroelectric capacitor in a memory cell, in order to minimize a pealing and lifting of the lower electrode from an underlying plug in the process of forming a ferroelectric material film as a capacitor dielectric film and in its succeeding annealing process. The metal nitride film is formed of a nitride of a metal constituting the first or second metal film.

REFERENCES:
patent: 5519237 (1996-05-01), Itoh et al.
patent: 6046469 (2000-04-01), Yamazaki et al.
patent: 6492222 (2002-12-01), Xing
patent: A 06-326249 (1994-11-01), None
patent: A 07-245237 (1995-09-01), None
patent: A 08-236719 (1996-09-01), None
patent: A 11-317500 (1999-11-01), None
“Metallization” McGraw-Hill,ULSI Technology, International Editions, Chapter 8, 1996, coverpage and p. 451.

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