Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent
1990-07-13
1992-02-25
Fears, Terrell W.
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
365 51, G11C 1300
Patent
active
050918834
ABSTRACT:
An input buffer for processing an external signal is provided in one of passways, which is the most closest to a line for equally dividing the whole of a plurality of memory cell blocks longitudinally or laterally into two sections, the passway interposing between the adjacent memory cell blocks of the plurality of memory cell blocks to which a processed signal of the input buffer is transmitted, whereby the length of the signal pass from the input buffer to each memory cell of the memory cell blocks can be shortened. Therefore, since the memory cell or a logic element existing between the input buffer and the memory cell is operated by a pulse of little distortion without delay of time, a access time can be reduced and a processing speed of a microprocessor can be increased. Further, a degree of freedom in designing a system of a memory or the microprocessor is further improved.
REFERENCES:
patent: 4954987 (1990-09-01), Auvinen et al.
Akioka Takashi
Hiraishi Atushi
Iwamura Masahiro
Kobayashi Yutaka
Matsuzaki Nozomu
Fears Terrell W.
Hitachi , Ltd.
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