Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-10-17
2006-10-17
Luu, Chuong Anh (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S238000, C438S197000, C438S386000, C438S239000
Reexamination Certificate
active
07122429
ABSTRACT:
According to the present invention, there is provided a semiconductor memory having a memory cell array region and peripheral circuit region, comprising, a gate electrode formed on a semiconductor substrate via a first insulating film in each of said memory cell array region and peripheral circuit region, and including a conductive layer which at least partially includes a silicon layer, and a second insulating film, a first oxide film formed on side surfaces of said conductive layer included in said gate electrode and on said semiconductor substrate in said memory cell array region, a second oxide film formed on side surfaces of said conductive layer included in said gate electrode and on said semiconductor substrate in said peripheral circuit region, and having a film thickness smaller than that of said first oxide film, a first nitride film formed on side surfaces of said gate electrode in said memory cell array region, and a second nitride film formed on side surfaces of said gate electrode in said peripheral circuit region, and having a film thickness larger than that of said first nitride film.
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patent: 2001-352046 (2001-12-01), None
patent: 2002-43549 (2002-02-01), None
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Luu Chuong Anh
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