Semiconductor memory

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch

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Details

365219, 365230, G11C 800

Patent

active

046912983

ABSTRACT:
An electrically programmable read only memory is equipped with latch circuits for sequentially introducing series signals which are fed through external terminals. The converter includes sequentially operated switch elements and latch circuits in order to convert the series signals into parallel signals. The thus converted parallel signals are written simultaneously in a memory array via address decoder operated selection switch elements. According to this method, the writing operations into the memory array can be conducted at a high speed even when one writing operation is relatively long as a result of the parallel signal action.

REFERENCES:
patent: 4130900 (1978-12-01), Watanabe

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