Semiconductor memory

Static information storage and retrieval – Read/write circuit – Precharge

Reexamination Certificate

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C365S154000, C365S210100

Reexamination Certificate

active

07580305

ABSTRACT:
A semiconductor memory includes: first and second bit lines; a precharge circuit for precharging the first and second bit lines to a predetermined potential; a plurality of memory cells each connected to the first or second bit line, a selected one of the memory cells maintaining or discharging one of the precharged first and second bit lines according to a signal held by the selected memory cell; word lines for selecting the memory cells; first and second reference cells connected to the first and second bit lines, respectively, a selected one of the first and second reference cells discharging the first or second bit line connected to the selected reference cell; and first and second reference cell word lines for selecting the first and second reference cells, respectively.

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Osamu Minato, et al., “THPM 15.5: A 2Ons 64K CMOS SRAM,” IEEE International Solid-State Circuits Conference, Feb. 23, 1984, pp. 222-223, Session XV: Static RAMs, IEEE.

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