Semiconductor memory

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch

Reexamination Certificate

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Details

C365S189011, C365S189080

Reexamination Certificate

active

06292404

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to a semiconductor memory, and especially to a semiconductor memory having a function of writing a clear data into an address of a memory from which the data has been read.
BACKGROUND OF THE INVENTION
Picture-drawing data of the printer serving as an output apparatus is stored in a page image memory. A process of writing into the page image memory is conducted as follows. An OR operation or an AND operation is conducted between a bit map data drawn up in accordance with the picture-drawing data supplied from a system such as a personal computer etc. and the data is stored in a write memory, and the data is written into a memory cell depending on a result of the aforementioned operation. When the picture-drawing data is completed and outputted to a printing engine, the aforementioned data is cleared to “0” or “1”, which is called clear after read.
In case that a DRAM (Dynamic Random Access Memory) is used as the page image memory, writing into the page image memory (the write memory) is conducted in such a way that the data stored in the write memory is once read, an OR operation or an AND operation is conducted between the write data and the aforementioned read-data in an external operational circuit, and the result of the operation is written back to the write memory.
In general, a printing speed of the printer is greatly dependent on the speed of drawing up the picture-drawing data and storing the same in the page image memory. In terminals of a computer system, the speed of printing of the printer is used to characterize the printer class, and improvement of printing speed is greatly demanded. As a method for elevating the printing speed, improvement of the process of drawing up the picture-drawing data can be thought out. From this point of view, it is expected that improvement of process of storing the picture-drawing data (write into the memory) contributes to elevation of the printing speed.
However, in the conventional semiconductor memory, a remedy for storing the picture-drawing data contributing to improvement of the printing speed is not yet investigated, and the speed of writing into the memory still remains slow.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the invention to provide a semiconductor memory in which a writing speed of picture-drawing data is elevated and there by a printing speed of a printer is improved.
According to the feature of the invention, a semiconductor memory comprises:
a memory cell array composed of plural memory cells of a predetermined number which are decoded in row and column directions,
a data input memory means for temporarily storing a data to be written into the memory cell array, and
an operation-control means which refers to another data read from a memory cell for write in the memory cell array and enable signals concerned with data-writing, and writes the data into the memory cell for write in accordance with a state of the enable signals.
According to the aforementioned structure, the operation-control circuit refers to a combination of enable signals concerned with data-writing and a data in a memory cell for write, and whether the data stored in a data input buffer is written into the memory cell in the memory cell array or not is determined depending on the result of OR or AND operation. As a result, at the time of data-writing into the memory cell array, complicated circuits for OR and AND operations which have been necessary in the conventional semiconductor memory become unnecessary, and the data can be written into the memory cell array equally to the conventional semiconductor memory at the same timing as that of ordinary write by a simple circuit built in the semiconductor memory. Moreover, clear after read for clearing the memory can be conducted by a simple circuit structure.


REFERENCES:
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patent: 5432743 (1995-07-01), Kusakari
patent: 5523981 (1996-06-01), Yamaguchi et al.
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patent: 5732024 (1998-03-01), Sharma et al.
patent: 5777608 (1998-07-01), Lipovski et al.

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