Semiconductor memory

Details Semiconductor memory Semiconductor memory

2000-06-21

2001-03-13

Le, Vu A. (Department: 2824)

Static information storage and retrieval

Read/write circuit

Precharge

C365S205000, C365S207000

Reexamination Certificate

active

06201749

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor memory allowing precharging circuitry thereof to rapidly precharge sense amplifiers and I/O (Input/Output) lines for thereby implementing rapid data reading and writing.
It is a common practice with a DRAM (Dynamic Random Access Memory) or similar semiconductor memory to precharge bit line pairs connected to sense amplifiers and I/O lines before reading or writing data. The I/O lines are signal lines via which signals subjected to differential amplification are output from the sense amplifiers. Rapid precharging allows data to be rapidly written to or read out of memory cells.
Conventional semiconductor memories, however, have some problems left unsolved, as will be described specifically later with reference to the accompanying drawings.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a semiconductor memory capable of reducing a precharging time without increasing a chip size and thereby realizing a short access time.
A semiconductor memory of the present invention includes a plurality of memory cell regions each being constituted by a particular memory cell and a plurality of word lines for selecting the memory cells. A word line drive circuit activates, based on an address signal input from outside the memory, one word line to which a memory cell designated by the address signal is connected. A bit line connected to the memory cell selected by the activated word line reads data out of the memory cell in the form of a voltage change. A sense amplifier amplifies a potential difference between two adjoining bit lines forming a bit line pair to thereby output two data voltages respectively corresponding to the two bit lines. A sense amplifier precharge circuit charges, before the sense amplifier starts amplifying the potential difference, a power supply line and a ground line, which feed a voltage to the sense amplifier, to a preselected voltage. A drive circuit feeds to the gates of a first and a second n-channel MOS Metal Oxide Semiconductor) transistor included in the sense amplifier precharge circuit a control signal of a preselected high-level voltage from a third n-channel MOS transistor. The first and second n-channel MOS transistors feed a precharge current output from a precharge power supply to the power supply line and ground line, respectively. The sense preamplifier precharge circuit may be replaced with or combined with an I/O (Input/Output) line precharge circuit for precharging I/O lines.


REFERENCES:
patent: 5265058 (1993-11-01), Yamauchi
patent: 5412605 (1995-05-01), Ooishi

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