Semiconductor memories with serial sensing scheme

Static information storage and retrieval – Read/write circuit – Multiplexing

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365207, G11C 702

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active

052991571

ABSTRACT:
Signals are simultaneously read out from a plurality of memory cells connected to one selected word line onto respective data lines. By successively making a selection out of data lines, signals read simultaneously onto respective data lines are serially and successively sensed by means of one signal sensing means. As for restoring operation as well, restoring is successively performed via the signal transferring means on the basis of the result sensed by the signal sensing means. By thus making a plurality of data lines share either signal sensing means or both signal sensing means and restoring means, the number of these means can be reduced and the layout pitch of these means can be relaxed. Therefore, a semiconductor memory having a higher density can be realized.

REFERENCES:
patent: 4982368 (1991-01-01), Arimoto
IEEE ISSCC Digest of Technical Papers pp. 248-249.
1987 IEEE ISSCC Digest of Technical Papers pp. 256-257.
1982 IEEE ISSCC Digest of Technical Papers pp. 18-19.
1988 IEEE ISSCC Digest of Technical Papers pp. 238-239.
1980 IEEE ISSCC Digest of Technical Papers pp. 228-229, 234-235.
IEEE Trans. on Electron Devices, v. 37, No. 3, Mar. 1990 pp. 737-743.
Electronics, Jun. 22, 1978, pp. 133-137.

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