Semiconductor integrated memory manufacturing method and device

Details Semiconductor integrated memory manufacturing method and device Semiconductor integrated memory manufacturing method and device

1999-03-26

2000-12-26

Picardat, Kevin M.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438253, 438387, H01L 218242

Patent

active

061658375

ABSTRACT:
A method of manufacturing a semiconductor integrated memory device including a plurality of a memory cells, and the semiconductor memory device, wherein each memory cell includes a transistor and a capacitor. The capacitor is formed of first and second electrodes and a dielectric layer. The first electrode and the dielectric layer are successively formed on a main surface of a semiconductor substrate by epitaxial growth. A region of the capacitor is removed to expose a region of the main surface of the substrate under the capacitor. A single crystal semiconductor layer is formed on the exposed region of the substrate by epitaxial growth, and the transistor is formed on the single crystal semiconductor layer, thereby to obtain a device having high integration density integration and preferred performance with high yield.

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patent: 5854500 (1998-12-01), Krautschneider
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patent: 6015990 (2000-01-01), Hieda et al.
patent: 6037210 (2000-03-01), Leas

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