Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
Reexamination Certificate
2005-01-04
2005-01-04
Browne, Lynne H. (Department: 2116)
Electrical computers and digital processing systems: support
Synchronization of clock or timing signals, data, or pulses
C713S600000, C327S141000, C365S233100
Reexamination Certificate
active
06839859
ABSTRACT:
A clock non-synchronous type circuit performs data read operation on the basis of a read control signal. After a lapse of a predetermined delay time, read data is read out from the clock non-synchronous type circuit. The read data is latched in selected one of N latch circuits. A latch circuit is selected on the basis of a control signal instead of a clock signal. The control signal represents that read data is output from the clock non-synchronous type circuit, and hence a latch circuit is always selected after read data is output.
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Kiroshi Adachi; 1992, 6, 23. Japanese Patent Publication (Kokoku) No. 1992-38016.
Koinuma Hiroyuki
Kouchi Toshiyuki
Yoshihara Masahiro
Browne Lynne H.
Du Thuan
Gray Cary Ware & Freidenrich LLP
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