Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2005-03-22
2005-03-22
Deady, Albert (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C375S221000, C714S733000
Reexamination Certificate
active
06871311
ABSTRACT:
A semiconductor integrated circuit device includes a transmitting circuit capable of converting first parallel signals to a first serial signal, a receiving circuit capable of converting a second serial signal to second parallel signals, a test signal generating circuit, and an operation judging circuit, all of which are formed on a single semiconductor chip. The test signal generating circuit and the operation judging circuit are formed so as to operate in accordance with a clock having a frequency corresponding to a transfer rate of the first or second parallel signals.
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Harada Takashi
Ueno Satoshi
Watanabe Keiki
Deady Albert
Gandhi Dipakkumar
Mattingly ,Stanger ,Malur & Brundidge, P.C.
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