Static information storage and retrieval – Read/write circuit – Precharge
Patent
1999-06-28
2000-10-31
Mai, Son
Static information storage and retrieval
Read/write circuit
Precharge
36518905, G11C 700
Patent
active
061412740
ABSTRACT:
In a semiconductor integrated circuit having the function of executing a pre-charge operation of a data bus when data is transferred to the data bus from a plurality of driver circuits connected to the data bus, a reset circuit for executing the pre-charge operation of the data bus is constituted so as to start the pre-charge operation of the data bus upon receiving an end timing of a strobe signal. Preferably, the reset circuit detects that the data bus reaches a pre-charge level for executing the pre-charge operation, and then terminates the pre-charge operation. On the other hand, in a semiconductor integrated circuit having a data latch function by a pipeline system when the data is read out from a memory cell, etc., in synchronism with a clock, a plurality of latch circuit units for temporarily storing the data are disposed in a data read path, and each of these latch circuit units is constituted in such a manner as to allow the data to pass, as such, when a control signal for controlling data latch is inputted, and to latch the data when the control signal is not inputted.
REFERENCES:
patent: 5748553 (1998-05-01), Kitamura
patent: 5805504 (1998-09-01), Fujita
patent: 5828608 (1998-10-01), Nguyen et al.
Eto Satoshi
Kawabata Kuninori
Kikutake Akira
Koga Toru
Matsumiya Masato
Fujitsu Limited
Mai Son
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